Processor Fundamentals
51 questions· page 1 of 6
The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX).
| Instruction | Explanation | |
|---|---|---|
| Opcode | Operand | |
| LDM | #n | Immediate addressing. Load the number n to ACC |
| LDD | <address> | Direct addressing. Load the contents of the location at the given address to ACC |
| LDI | <address> | Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC |
| INC | <register> | Add 1 to the contents of the register (ACC or IX) |
| STO | <address> | Store the contents of ACC at the given address |
| ADD | #n/Bn/&n | Add the number n to the ACC |
| DEC | <register> | Subtract 1 from the contents of the register (ACC or IX) |
| JMP | <address> | Jump to the given address |
| CMP | <address> | Compare the contents of ACC with the contents of <address> |
| JPE | <address> | Following a compare instruction, jump to <address> if the compare was True |
| END | Return control to the operating system |
ACC denotes Accumulator
<address> can be an absolute or a symbolic address
denotes a denary number, e.g. #123
B denotes a binary number, e.g. B01001010
& denotes a hexadecimal number, e.g. &4A
The current contents of memory are:
| address | Instruction |
|---|---|
| 80 | 10 |
| 81 | 8 |
| 82 | 80 |
| 83 | 81 |
| ... | |
| 200 | LDD 81 |
| 201 | INC ACC |
| 202 | STO 83 |
| 203 | LDI 82 |
| 204 | CMP 83 |
| 205 | JPE 209 |
| 206 | LDD 83 |
| 207 | ADD #10 |
| 208 | JMP 210 |
| 209 | DEC ACC |
| 210 | STO 81 |
| 211 | END |
Trace the program currently in memory using the following trace table.
| Instruction address | ACC | Memory address | |||
|---|---|---|---|---|---|
| 80 | 81 | 82 | 83 | ||
| 10 | 8 | 80 | 81 | ||
Write the bit manipulation instruction that can be used to set the least significant bit to 1 in an 8-bit register. All other bits must remain unchanged.
The instruction needs to work on a register that contains any 8-bit binary number.
The ACC currently contains the following binary value.
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
|---|
Write the result after the instruction XOR &FE is run.
The ACC currently contains the following binary value.
| 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 |
|---|
Write the result after the instruction LSR #5 is run.
The table has six statements about the Von Neumann model for a computer system.
Three of the statements are incorrect.
| Statement number | Statement |
|---|---|
| 1 | The Program Counter (PC) stores the next instruction to be fetched from memory. |
| 2 | The Arithmetic and Logic Unit (ALU) performs mathematical and logical operations. |
| 3 | The Control Unit (CU) sends signals to other components on the data bus. |
| 4 | The Memory Data Register (MDR) transfers data to the memory address stored in the Memory Address Register (MAR). |
| 5 | The MAR stores an address from memory. |
| 6 | The Accumulator (ACC) stores the result of calculations. |
Complete the table by writing the three incorrect statement numbers and the corrected statements.
| Incorrect statement number | Corrected statement |
|---|---|
| ............................... | ........................................................................................................................... ........................................................................................................................... ........................................................................................................................... |
| ............................... | ........................................................................................................................... ........................................................................................................................... ........................................................................................................................... |
| ............................... | ........................................................................................................................... ........................................................................................................................... ........................................................................................................................... |
Registers that are used in the Fetch-Execute (F-E) cycle include the PC, MAR, MDR and the ACC.
Identify one other register and describe its role in the Fetch-Execute (F-E) cycle.
Register ....................................................................................................................................
Role ..........................................................................................................................................
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Explain how an interrupt from an input device will be detected and handled in the F-E cycle.
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Trace the program currently in memory using the following trace table.
| Instruction address | ACC | Memory address | ||||
|---|---|---|---|---|---|---|
| 10 | 11 | 12 | 13 | 14 | ||
| 12 | 11 | 10 | 22 | 22 | ||
State the effect of changing instruction LDD 10 in address 100 to LDM #10
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Identify and describe one mode of addressing not given in the table of instructions in part (a).
Mode of addressing ...........................................................................................................
Description ........................................................................................................................
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The ACC currently contains the following binary value.
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 |
|---|
Write the result after the instruction OR B00001111 is run.
The ACC currently contains the following binary value.
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
|---|
Write the result after the instruction XOR #30 is run.
Explain how the CU and the system clock work together.
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The processor runs the Fetch-Execute (F-E) cycle.
Write the stages of the F-E cycle using register transfer notation.
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The computer has cache memory.
Describe one benefit of the computer using cache memory.
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The computer connects to a monitor using a High Definition Multimedia Interface (HDMI) cable that connects into an HDMI port.
Explain how HDMI provides connection to peripheral devices.
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Trace the program currently in memory using the following trace table.
| Instruction address | ACC | Memory address | |||
|---|---|---|---|---|---|
| 50 | 51 | 52 | 53 | ||
| 47 | 48 | 49 | 50 | ||
Complete the table by identifying and describing two modes of addressing that are not used in the program in part (a).
| Mode of addressing | Description |
|---|---|
| ................................................... | ................................................................................ ................................................................................ ................................................................................ ................................................................................ |
| ................................................... | ................................................................................ ................................................................................ ................................................................................ ................................................................................ |
The table shows part of the instruction set for a processor. The processor has one register: the Accumulator (ACC).
| Instruction | Explanation | |
|---|---|---|
| Opcode | Operand | |
| AND | #n/Bn/&n | Bitwise AND operation of the contents of ACC with the operand |
| AND | <address> | Bitwise AND operation of the contents of ACC with the contents of <address> |
| XOR | #n/Bn/&n | Bitwise XOR operation of the contents of ACC with the operand |
| XOR | <address> | Bitwise XOR operation of the contents of ACC with the contents of <address> |
| OR | #n/Bn/&n | Bitwise OR operation of the contents of ACC with the operand |
| OR | <address> | Bitwise OR operation of the contents of ACC with the contents of <address> |
<address> can be an absolute or a symbolic address
denotes a denary number, e.g. #123
B denotes a binary number, e.g. B01001010
& denotes a hexadecimal number, e.g. &4A
Write the bit manipulation instructions that can be used to set only the most significant bit to 1 in an 8-bit register.
The instructions need to work on a register that contains any 8-bit binary number.
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The ACC currently contains the following positive binary integer:
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |
|---|
Write a bit manipulation instruction that uses a binary shift to change the contents of the ACC to:
| 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |
|---|
Instruction ...........................................................................................................................
The ACC currently contains the following positive binary integer:
| 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
|---|
Write the contents of the ACC after the instruction XOR &12 is carried out.
The ACC currently contains the following positive binary integer:
| 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
|---|
Write the contents of the ACC after the instruction AND #63 is carried out.
The ACC currently contains the following positive binary integer:
| 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
|---|
The current contents of memory are:
| Address | Data |
|---|---|
| 98 | 00100100 |
| 99 | 00110001 |
| 100 | 00110011 |
| 101 | 10100011 |
| 102 | 10101100 |
Write the contents of the ACC after the instruction OR 100 is carried out.
Registers such as the Accumulator (ACC) and the Index Register (IX) are used in the CPU.
Identify two special purpose registers used in the CPU. Do not include the ACC or IX in your answers.
1 .........................................................................................................................................
2 .........................................................................................................................................
The following table shows part of the instruction set for a processor. The processor has two registers: the ACC and an IX.
| Instruction | Explanation |
| :--- | :--- | :--- |
| Opcode | Operand | |
| LDM | #n | Immediate addressing. Load the number n to ACC |
| LDD | <address> | Direct addressing. Load the contents of the location at the given address to ACC |
| LDI | <address> | Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC |
| LDX | <address> | Indexed addressing. Form the address from <address> + the contents of the index register. Copy the contents of this calculated address to ACC |
| LDR | #n | Immediate addressing. Load the number n to IX |
<address> can be an absolute or symbolic address
# denotes a denary number, e.g. #127
The current contents of the main memory and the index register are shown.
| Address | Instruction |
|---|---|
| 98 | 8 |
| 99 | 16 |
| 100 | 3 |
| 101 | 98 |
| 102 | 32 |
| IX | 2 |
Write the contents of the ACC after each instruction is executed.
| Instruction | Value in ACC |
|---|---|
| LDM #98 | |
| LDI 101 | |
| LDX 100 |
A student buys a new computer. The table shows the specifications of the old computer and the new computer.
| Old computer | New computer |
|---|---|
| 1.8 GHz dual core processor | 2.3 GHz dual core processor |
| 16 MB cache | 32 MB cache |
Explain why increasing the clock speed and increasing the cache memory will improve the performance of the computer.
Clock speed ..............................................................................................................................
Cache memory ..........................................................................................................................
Complete the table by writing the contents of the ACC after the execution of each instruction.
| Current contents of the ACC | Instruction | Contents of the ACC after the execution of the instruction |
|---|---|---|
| 0000 1111 | AND 101 | |
| 0000 0000 | LDM #100 | |
| 0000 0001 | XOR &F1 | |
| 0001 0001 | CMP 101 |
The Von Neumann model for a computer system uses registers.
Describe the role of the Memory Address Register (MAR) and Memory Data Register (MDR) in the fetch-execute (F-E) cycle.
Assembly language instructions are grouped.
Complete each statement by writing the name of the appropriate instruction group.
Loading data into the accumulator is an example of an instruction in the ............................................................... group.
Incrementing the index register is an example of an instruction in the ............................................................... group.
Branching to another address is an example of an instruction in the ............................................................... group.
The current contents of memory are shown:
| Address | Data |
|---|---|
| 19 | 24 |
| 20 | 2 |
| 21 | 1 |
| 22 | 3 |
| 23 | 5 |
| 24 | 4 |
| 25 | 22 |
The current contents of the ACC and IX are shown:
| ACC | 12 |
|---|---|
| IX | 1 |
Complete the table by writing the content of the ACC after each program has run.
| Program number | Code | ACC content |
|---|---|---|
| 1 | LDD 20 ADD #2 | |
| 2 | LDX 22 | |
| 3 | LDI 25 INC ACC SUB 22 | |
| 4 | LDD 19 LDM #5 LDM #25 |
The processor includes these bit manipulation instructions:
| Instruction | Explanation | |
|---|---|---|
| Opcode | Operand | |
| AND | #n/Bn/&n | Bitwise AND operation of the contents of ACC with the operand |
| AND | <address> | Bitwise AND operation of the contents of ACC with the contents of <address> |
| XOR | #n/Bn/&n | Bitwise XOR operation of the contents of ACC with the operand |
| XOR | <address> | Bitwise XOR operation of the contents of ACC with the contents of <address> |
| OR | #n/Bn/&n | Bitwise OR operation of the contents of ACC with the operand |
| OR | <address> | Bitwise OR operation of the contents of ACC with the contents of <address> |
<address> can be an absolute or a symbolic address
denotes a denary number, e.g. #123
B denotes a binary number, e.g. B01001010
& denotes a hexadecimal number, e.g. &4A
The current contents of memory are shown:
| Address | Data |
|---|---|
| 30 | 01110101 |
| 31 | 11111111 |
| 32 | 00000000 |
| 33 | 11001100 |
| 34 | 10101010 |
The current content of the ACC is shown:
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
|---|
Complete the table by writing the content of the ACC after each program has run.
The binary number 10011010 is reloaded into the ACC before each program is run.
| Program number | Code | ACC content |
|---|---|---|
| 1 | AND 31 | |
| 2 | XOR B01001111 | |
| 3 | OR #30 |
The current contents of memory are shown:
| Address | Data |
|---|---|
| 10 | 1 |
| 11 | 3 |
| 12 | 5 |
| 13 | 11 |
| 14 | 10 |
| 15 | 16 |
| 16 | 12 |
The current contents of the ACC and IX are shown:
ACC: 10
IX: 0
Complete the table by writing the content of the ACC after each program has run.
| Program number | Code | ACC content |
|---|---|---|
| 1 | LDI 15 SUB #1 | |
| 2 | LDD 14 ADD 11 | |
| 3 | LDM #11 ADD #3 SUB 16 | |
| 4 | LDR #2 LDX 14 ADD #2 |
The processor includes these bit manipulation instructions:
| Instruction | Explanation | |
|---|---|---|
| Opcode | Operand | |
| AND | #n/Bn/&n | Bitwise AND operation of the contents of ACC with the operand |
| AND | <address> | Bitwise AND operation of the contents of ACC with the contents of <address> |
| XOR | #n/Bn/&n | Bitwise XOR operation of the contents of ACC with the operand |
| XOR | <address> | Bitwise XOR operation of the contents of ACC with the contents of <address> |
| OR | #n/Bn/&n | Bitwise OR operation of the contents of ACC with the operand |
| OR | <address> | Bitwise OR operation of the contents of ACC with the contents of <address> |
<address> can be an absolute or a symbolic address
denotes a denary number, e.g. #123
B denotes a binary number, e.g. B01001010
& denotes a hexadecimal number, e.g. &4A
The current contents of memory are shown:
| Address | Data |
|---|---|
| 25 | 11000110 |
| 26 | 11100001 |
| 27 | 10000001 |
| 28 | 11001101 |
| 29 | 00001111 |
The current content of the ACC is shown:
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 |
Complete the table by writing the content of the ACC after each program has run.
The binary number 01000110 is reloaded into the ACC before each program is run.
| Program number | Code | ACC content |
|---|---|---|
| 1 | XOR 29 | |
| 2 | AND #29 | |
| 3 | OR B11111111 |